The goal of the thesis is to conduct a study of the effects of scheduling policies and machine failures on the manufacturing cycle time of the Integrated Circuit (IC) manufacturing process for two processor chips, namely Skylake and Kabylake, manufactured by Intel. The fab simulation model was developed as First in First Out (FIFO), Shortest Processing Time (SPT), Priority based (PB), and Failure FIFO (machine failures) model, and the average cycle times and queue waiting times under the four scheduling policy models were compared for both the Skylake and Kabylake wafers. The study revealed that scheduling policies SPT and PB increased the average cycle time for Skylake wafers while decreasing the average cycle time for the Kabylake wafers, when compared to the base FIFO model. Machine failures increased the average cycle time for both types of wafers.



An integrated circuit (IC) is a device made of interconnected electronic components that are imprinted onto a tiny slice of a semiconducting material, such as silicon or germanium. An integrated circuit is smaller than a fingernail and can hold millions of circuits that are capable of performing a wide range of computing operations at high speeds. Monocrystalline silicon was identified as the main-substrate that can be used to manufacture IC’s. This material is abundantly available in nature and has very special properties making it extremely affordable and appealing. It acts as a semiconductor, wherein it conducts electricity under some conditions and alternatively acts as an insulator in others. These properties have enabled IC’s to be extensively used in electronic devices like computers and mobile phones. 


Semiconductor manufacturing takes place under constant change of manufacturing conditions. With the advent of process technology, the size of the area per function on the wafer has reduced to almost half. Also, many new chips with complex architectures are introduced, which need to be accommodated in the existing process technology. This calls for continuous process improvement in the semiconductor chip manufacturing process to cater to the fast-changing market demands. 


IC’s undergo manufacturing in production units called fabs. Big giants like Intel,

Texas Instruments and Apple manufacture IC’s in their own fabs, whereas other companies like Advanced Micro Devices and Qualcomm outsource the manufacturing process to other global chip manufacturers around the world. Fabs require expensive devices to function, and estimates suggest the cost of establishing a new fab plant to values as high as $3-$4 billion. The central part of the fab, referred to as the clean room, houses the machines required for the manufacturing process. This room is designed as a dust-free environment, since even a small speck of dust can ruin the micro-circuit. The room also maintains a controlled temperature and humidity and is also damped against vibration. 


Moore’s Law

Moore’s Law was an observation made by Gordon E. Moore, the co-founder of Intel. This law states that the number of transistors per area doubles approximately every two years (Moore, 1975). Because of the accuracy with which Moore's Law has predicted past growth in IC complexity, it is viewed as a reliable method of calculating future trends as well, setting the pace of innovation, and defining the rules and the very nature of competition. And since the semiconductor portion of electronic consumer products keeps growing by leaps and bounds, the Law has aroused in users and consumers an expectation of a continuous stream of faster, better, and cheaper high-technology products (Schaller, 1997). Further, the simple idea that transistor density is continually increasing means computing power goes up just as costs and energy consumption go down. As of today, the number of transistors on an integrated chip have substantially increased from a mere 103 in 1970 to 109 in 2017. 

Chip Design and Architecture

The scope of the study was confined to manufacturing two different types of processor chips manufactured by Intel, namely Skylake (i7-7800X) and Kabylake (i5-



Skylake Architecture

Skylake is a chip micro-architecture that was launched by Intel in August 2015 as a successor to Broadwell to overcome processing delays. Skylake was branded as the 6th generation of Intel’s processors (Intel Developer Forum, 2015). The thesis deals with the process analysis of the i7 family of the Skylake processor. This processor has a high-end performance and uses the 14 nanometer (14 nm) lithography process of semiconductor manufacturing. 

Semiconductor Manufacturing Process

The technology behind engineering an IC goes far beyond the simple assembling of individual components. In fact, microscopic circuit patterns are built on multiple layers of various materials, and only after these steps have been repeated a few hundred times is the chip finally complete (Samsung, 2015). It involves multiple photolithographic and chemical processing steps during which the electronic circuit layers are gradually developed over the silicon wafer. The entire process from sand to packed silicon chips takes almost 3-4 weeks.