PROCESS MODELING OF A WIRE SAW OPERATION
Multicrystalline (MC) silicon solar cells are manufactured from bread-loaf sized ingots of solar-grade silicon. These ingots are sliced by a multi-wire saw mechanism consisting of a single thin and extremely long stainless steel wire wound on constantpitch wire grooves. The wire is wound over each groove to create a web consisting of 500-700 parallel wires. The wire is kept at a constant tension using feedback control and the wire speeds typically are 10-15 m/s. A high speed nozzle directs an aqueous slurry of oil and SiC particles to the top of the wire array and the crystal silicon ingot is pushed upwards against the wire array during the cut. In a typical wire saw system, MC ingots are sliced with an area of 100x100 mm2 and the latest wire saw systems can achieve thicknesses down to 300 µm.
What makes this a challenging simulation problem is the wide range of timescales that characterize the overall cutting process. The slowest dynamics are associated with the evolution of the cut, which is described by a spatially dependent differential equation in time and in which the cutting rate is modeled much in the same manner as the Chemical Mechanical Planarization (CMP) process. Cutting rate
Photovoltaic (PV) materials and module processing
industry has been a large focus for research for the last two decades because
of the obvious desire for alternative energy. The projected total energy
consumption in the year 2050 is projected to be 28 TW. Energy in the form of
sunlight provides 14 TW in an hour so there is much to gain by converting this
abundant source into a consumable source of energy. However, in 2007 it cost 30
cents kWh−1 to produce
energy using PV technology and when compared with the 5-8 cents kWh−1 cost from conventional
resources (coal, fossil fuels, natural gas) , economic hurdles still exist for
commercial PV implementation.
As with transistors and microprocessors, silicon is the main semiconductor material in PV cells. Purified polysilicon is melted and crystallized into cylindrical or rectangular ingots via either the Chocharlaski technique or the (MC) multicrystalline technique. Figure 1 shows a typical MC ingot to be wafered. The square MC silicon wafers comprise 82 % of PV modules. The cost of PV modules
and cells is proportional to the cost of solar grade crystalline polysilicon. In 2003, 2004, and 2005 polysilicon costs were $24 kg−1, $32 kg−1, and $45 kg−1, respectively. Due to this high demand and price, minimizing silicon lost to wafering and reducing the thickness of the wafer is imperative.
To the knowledge of this researcher, only one other
American group (SUNY Stony Brook) has developed wire saw models and
experiments. Predominantly all wire saw research is based in Asia and Europe.
One long-term goal is to develop a series of models and experiments to predict
surface quality and determine factors to reduce wafer thickness.
To the knowledge of this researcher, only one other American group (SUNY Stony Brook) has developed wire saw models and experiments. Predominantly all wire saw research is based in Asia and Europe. One long-term goal is to develop a series of models and experiments to predict surface quality and determine factors to reduce wafer thickness.Our goal in this project is to develop a novel model that couples the slow dynamics of the ingot cutting evolution and the fast dynamics of the cutting. Subsequently, cutting rates along the wire length, cutting time, and the sensitivity of these variables to process parameters will be determined.